Tim of All Trades
A tenacious ASIC, FPGA, and Embedded Systems engineer eager to apply my skills in the latest technologies the semiconductor industry has to offer. My previous work experience includes multi-clock domain FPGA application design in SystemVerilog on Qualcomm's Test Base Station Team in San Diego, as well as ASIC design internships at Cisco in Silicon Valley, and C/C++ software application-focused internships at Viasat. In my free time I like to explore National Parks on my gravelbike, create 3d models in Blender for my FDM printer, and tinker with SBCs to see what new applications I can put together. Let's connect!
Work Experience
Jul 2017 - Dec 2023 ( 6 yrs )
Sr. Digital HW Engineer
- HW Design Lead for IQ-Resampling on Xilinx Ultrascale+ FPGA system between Emulated Modem and Emulated Base Station
- Leveraged AXI/AMBA protocols for inter-block communication up to 100Gbps and Aurora 64/66b to ensure robust chip-to-chip communication
- Integrated on-target and off-target validation packages which matched Modelsim simulation results to on-target test results
April 2013 - Jun 2017 (4 yrs)
Teaching Assistant
- Guided students through weekly lab assignments
- Managed lab grading spreadsheets for all class sections
- Contributed to expansions, modifications, and clarifications to lab assignments
Jun 2015 - Sep 2015 & Jun 2016 - Sep 2016
ASIC Engineering Intern (Doppler Team)
- Updated RTL Rewrite Engine in DopplerDS and DopplerE Cisco custom switch ASIC designs
- Modified block pipeline stages to close timing
- Worked side-by-side with verification teams to remediate bug reports
Jun 2014 - Sep 2014
ViaSat Launch Intern
- Worked with a team to create an avionics “universal translator” on Beaglebone Black
- Designed a custom-built PCB to convert between ARINC-429 and RS-422
- Laid groundwork for a device to save ViaSat test engineers $180,000 in parts costs
